Lead FPGA Design Engineer

Location: Carlsbad, CA & Salt Lake City, UT

Job Description

Lead FPGA (Field Programmable Gate Array) Lead Design Engineer with industry experience in advanced signal processing techniques and/or Electronic Warfare techniques including Electronic Support and Electronic Attack.  Design, develop, and test advanced electronic warfare and multi-function systems. Our company’s development efforts include the whole lifecycle of designs from proposals, requirement definition, coding, simulation, synthesis, place and route, verification testing, and system support.  This position would focus on the coding, simulation, synthesis, place and route, and verification testing aspects.  We are looking for an engineer who enjoys challenging work with a team of talented engineers and can work well both with a team and as an individual contributor.

Areas of expected technical experience or education include:

Leading an FPGA design team in the implementation and verification of complex designs in large FPGA devices.
Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets.
Experience in laboratory debug techniques using signal generators, digital oscilloscopes, logic analyzers, BERTS, and other complex measurement devices.
Experience with timing closure in large FPGAs.
Experience implementing industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet).
Familiarity with/exposure to some or all of the following
Modulation
Demodulation
Digital filters
Forward Error Correction (FEC)
Electronic Warfare
Networking

Basic Qualifications:

Bachelor’s Degree and minimum 9 years of prior relevant experience. Graduate Degree and a minimum of 7 years of prior related experience. In lieu of a degree, minimum of 13 years of prior related software engineering experience.

Preferred Skills:

Bachelor’s (master’s preferred) degree in Computer Science, Computer Engineering, Software Engineering or Electrical Engineering.
9+ years FPGA design experience on Digital Signal Processing designs.
Experience leading technical employees in complex FPGA design
Skilled in either VHDL (preferred) or Verilog hardware development languages.
Experience implementing Electronic Support signal processing.
Experience implementing Electronic Attack signal processing.
Experience implementing complex Digital Signal Processing (DSP) algorithms in FPGA devices.  Equivalent experience in ASIC devices is also applicable.
FPGA Design using High-speed serial interfaces (3+ Gbps)
Familiarity with code revision management tools such as Git/ClearCase.
Familiarity with C/C++/C# and Matlab/Simulink.

In compliance with pay transparency requirements, the salary range for this role is $129,500 – $240,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. Our company also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

Candidate Details

7+ to 10 years’ experience
Seniority Level – Mid-Senior
Management Experience Required – No
Minimum Education – Bachelor’s Degree
Willingness to Travel – Occasionally

To apply send resume to [email protected]

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